The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 2021

Filed:

Mar. 29, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Kuo-Ju Chen, Taichung, TW;

Su-Hao Liu, Jhongpu Township, Chiayi County, TW;

Chun-Hao Kung, Hsinchu, TW;

Liang-Yin Chen, Hsinchu, TW;

Huicheng Chang, Tainan, TW;

Kei-Wei Chen, Tainan, TW;

Hui-Chi Huang, Zhubei, TW;

Kao-Feng Liao, Hsinchu, TW;

Chih-Hung Chen, Hsinchu, TW;

Jie-Huang Huang, Taoyuan, TW;

Lun-Kuang Tan, Hsinshu, TW;

Wei-Ming You, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6681 (2013.01); H01L 29/41791 (2013.01); H01L 29/785 (2013.01);
Abstract

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a source/drain structure, a dielectric layer, a contact plug. The gate structure is positioned over a fin structure. The source/drain structure is positioned in the fin structure and adjacent to the gate structure. The dielectric layer is positioned over the gate structure and the source/drain structure. The contact plug is positioned passing through the dielectric layer. The contact plug includes a first metal compound including one of group III elements, group IV elements, group V elements or a combination thereof.


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