The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Apr. 30, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kuo-Chi Tu, Hsinchu, TW;

Chih-Yang Chang, Yuanlin Township, TW;

Hsia-Wei Chen, Taipei, TW;

Chin-Chieh Yang, New Taipei, TW;

Sheng-Hung Shih, Hsinchu, TW;

Wen-Chun You, Dongshan Township, TW;

Wen-Ting Chu, Kaohsiung, TW;

Yu-Wen Liao, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); G11C 11/56 (2006.01); G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
H01L 45/146 (2013.01); G11C 11/5678 (2013.01); H01L 45/08 (2013.01); H01L 45/1253 (2013.01); H01L 45/1616 (2013.01); H01L 45/1675 (2013.01); G11C 14/0009 (2013.01); G11C 14/0045 (2013.01);
Abstract

A semiconductor structure includes a memory region. A memory structure is disposed on the memory region. The memory structure includes a first electrode, a resistance variable layer, protection spacers and a second electrode. The first electrode has a top surface and a first outer sidewall surface on the memory region. The resistance variable layer has a first portion and a second portion. The first portion is disposed over the top surface of the first electrode and the second portion extends upwardly from the first portion. The protection spacers are disposed over a portion of the top surface of the first electrode and surround the second portion of the resistance variable layer. The protection spacers are configurable to protect at least one conductive path in the resistance variable layer. The protection spacers have a second outer sidewall surface substantially aligned with the first outer sidewall surface of the first electrode.


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