The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2020
Filed:
Sep. 30, 2017
Intel Corporation, Santa Clara, CA (US);
Nevine Nassif, Arlington, MA (US);
Yen-Cheng Liu, Portland, OR (US);
Krishnakanth V. Sistla, Beaverton, OR (US);
Gerald Pasdast, San Jose, CA (US);
Siva Soumya Eachempati, Campbell, CA (US);
Tejpal Singh, Hudson, MA (US);
Ankush Varma, Hillsboro, OR (US);
Mahesh K. Kumashikar, Bangalore, IN;
Srikanth Nimmagadda, Bangalore, IN;
Carleton L. Molnar, Northborough, MA (US);
Vedaraman Geetha, Fremont, CA (US);
Jeffrey D. Chamberlain, Tracy, CA (US);
William R. Halleck, Lancaster, MA (US);
George Z. Chrysos, Portland, OR (US);
John R. Ayers, Portland, OR (US);
Dheeraj R. Subbareddy, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods and apparatuses relating to hardware processors with multiple interconnected dies are described. In one embodiment, a hardware processor includes a plurality of physically separate dies, and an interconnect to electrically couple the plurality of physically separate dies together. In another embodiment, a method to create a hardware processor includes providing a plurality of physically separate dies, and electrically coupling the plurality of physically separate dies together with an interconnect.