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For the Inventor, By the Inventor

Portland, OR, United States of America

Yen-Cheng Liu

This inventor holds 71 USPTO granted patents and 24 published patent applications and 11 EPO patents, primarily in High Performance Interconnect (CPC class G06F). Top assignee: Intel Corporation. Active years: 2008-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yen-Cheng Liu. Retrieved from https://idiyas.com/inventor/yen-cheng-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 71 

% Patents Active = 69.0

 

Average Co-Inventor Count = 5.3

ph-index = 8

Forward Citations = 204(Granted Patents)

Forward Citations (Not Self Cited) = 187(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal71 out of 56,440 
 
Intel Corporation
 patents

Years Active: 2008-2026

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Areas of Expertise:
Cache Coherency
Multi-Die Processors
Interconnect
Memory Ranges
Atomic Operations
Bandwidth Optimization
Quality of Service
Disaster Recovery
Snooping Performance
Shared Mesh
Virtual Shared Cache
71 patents (USPTO):Explore Patents
1. 12554644 - Hierarchical core valid tracker for cache coherency (2026-02-17),
2. 12339773 - Selection of victim entry in a data structure (2025-06-24),
3. 12253947 - Technologies for configuration of memory ranges (2025-03-18),
4. 12197357 - High performance interconnect (2025-01-14),
5. 12189550 - High performance interconnect (2025-01-07),
6. 12111783 - Flexible on-die fabric interface (2024-10-08),
7. 11966330 - Link affinitization to reduce transfer latency (2024-04-23),
8. 11899615 - Multiple dies hardware processors and methods (2024-02-13),
9. 11860670 - Accessing a memory using index offset information (2024-01-02),
10. 11741030 - High performance interconnect (2023-08-29),
11. 11734174 - Low overhead, high bandwidth re-configurable interconnect apparatus and method (2023-08-22),
12. 11698879 - Flexible on-die fabric interface (2023-07-11),
13. 11604730 - Redundant cache-coherent memory fabric (2023-03-14),
14. 11586579 - Multiple dies hardware processors and methods (2023-02-21),
15. 11537520 - Remote atomic operations in multi-socket systems (2022-12-27),

Title: Innovations by Yen-Cheng Liu: A Visionary in High-Performance Interconnect Technology

Introduction

Yen-Cheng Liu is a notable inventor based in Portland, OR, USA, recognized for his significant contributions to the field of high-performance interconnect technology. With an impressive portfolio of 68 patents, Liu has driven innovations that enhance the efficiency and functionality of communication systems in modern technology.

Latest Patents

Among his latest patents is the development of a high-performance interconnect, which revolves around a physical layer (PHY) coupled to a serial, differential link that supports multiple lanes. The invention encompasses a transmitter and receiver configured for each lane, enabling the embedding of a clock with the data transmitted over these lanes. A key feature of the PHY is the periodic issuance of a blocking link state (BLS) request, which prompts an agent to enter a low-power or partial-width state for specific PHY-related tasks. This design not only optimizes performance but also minimizes energy consumption during data transmission processes.

Career Highlights

Yen-Cheng Liu has established a remarkable career at Intel Corporation, where he continues to spearhead groundbreaking projects in communication technologies. His dedication to innovation has earned him recognition and respect among peers and industry leaders alike.

Collaborations

Liu’s work at Intel Corporation has allowed him to collaborate with several talented individuals, including Krishnakanth Venkata Sistla and Bahaa Fahim. These partnerships have fostered an environment of creativity and technological advancement, further pushing the boundaries of what's possible in high-performance interconnects.

Conclusion

Through his extensive work, Yen-Cheng Liu exemplifies the spirit of innovation. His contributions to interconnect technology not only enhance the performance of communication systems but also pave the way for future advancements in the field. As he continues to explore new technologies and methodologies, his legacy as an inventor will surely inspire future generations in the world of innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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