The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2025
Filed:
Jul. 05, 2023
Intel Corporation, Santa Clara, CA (US);
Robert J. Safranek, Portland, OR (US);
Robert G. Blankenship, Tacoma, WA (US);
Venkatraman Iyer, Austin, TX (US);
Jeff Willey, Timnath, CO (US);
Robert Beers, Hillsboro, OR (US);
Darren S. Jue, Sunnyvale, CA (US);
Arvind A. Kumar, Palo Alto, CA (US);
Debendra Das Sharma, Saratoga, CA (US);
Jeffrey C. Swanson, Sunnyvale, CA (US);
Bahaa Fahim, Santa Clara, CA (US);
Vedaraman Geetha, Fremont, CA (US);
Aaron T. Spink, San Francisco, CA (US);
Fulvio Spagna, San Jose, CA (US);
Rahul R. Shah, Marlborough, MA (US);
Sitaraman V. Iyer, San Jose, CA (US);
William Harry Nale, Livermore, CA (US);
Abhishek Das, Portland, OR (US);
Simon P. Johnson, Beaverton, OR (US);
Yuvraj S. Dhillon, Hillsboro, OR (US);
Yen-Cheng Liu, Portland, OR (US);
Raj K. Ramanujan, Federal Way, WA (US);
Robert A. Maddox, Columbia, SC (US);
Herbert H. Hum, Portland, OR (US);
Ashish Gupta, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.