The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Jan. 29, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Charles C. Kuo, Hillsboro, OR (US);

Kaan Oguz, Beaverton, OR (US);

Brian S. Doyle, Portland, OR (US);

Mark L. Doczy, Portland, OR (US);

David L. Kencke, Beaverton, OR (US);

Satyarth Suri, Hillsboro, OR (US);

Robert S. Chau, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/08 (2006.01); H01L 43/02 (2006.01); G11C 11/16 (2006.01); H01L 43/12 (2006.01);
U.S. Cl.
CPC ...
H01L 43/08 (2013.01); G11C 11/161 (2013.01); H01L 43/02 (2013.01); H01L 43/12 (2013.01);
Abstract

Techniques are disclosed for fabricating a self-aligned spin-transfer torque memory (STTM) device with a dot-contacted free magnetic layer. In some embodiments, the disclosed STTM device includes a first dielectric spacer covering sidewalls of an electrically conductive hardmask layer that is patterned to provide an electronic contact for the STTM's free magnetic layer. The hardmask contact can be narrower than the free magnetic layer. The first dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer. In some embodiments, the STTM further includes an optional second dielectric spacer covering sidewalls of its free magnetic layer. The second dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer and may serve, at least in part, to protect the sidewalls of the free magnetic layer from redepositing of etch byproducts during such patterning, thereby preventing electrical shorting between the fixed magnetic layer and the free magnetic layer.


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