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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10700275 B1

PDFFull Text
Date of Patent:
Jun. 30, 2020

Filed:

Dec. 20, 2018

Rram cell structure with laterally offset beva/teva

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Chih-Yang Chang, Yuanlin Township, TW;

Wen-Ting Chu, Kaohsiung, TW;

Kuo-Chi Tu, Hsin-Chu, TW;

Yu-Wen Liao, New Taipei, TW;

Hsia-Wei Chen, Taipei, TW;

Chin-Chieh Yang, New Taipei, TW;

Sheng-Hung Shih, Hsinchu, TW;

Wen-Chun You, Dongshan Township, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Attorney:

Eschweiler & Potashnik, LLC

Primary Examiner:

Grant S Withers

Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/124 (2013.01); H01L 27/2436 (2013.01); H01L 45/04 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/146 (2013.01); H01L 45/16 (2013.01); H01L 45/1675 (2013.01); H01L 45/1683 (2013.01); H01L 45/06 (2013.01); H01L 45/065 (2013.01); H01L 45/085 (2013.01); H01L 45/10 (2013.01); H01L 45/12 (2013.01); H01L 45/122 (2013.01); H01L 45/126 (2013.01); H01L 45/1206 (2013.01); H01L 45/1213 (2013.01); H01L 45/1226 (2013.01); H01L 45/1246 (2013.01); H01L 45/1266 (2013.01); H01L 45/1273 (2013.01); H01L 45/1286 (2013.01); H01L 45/1293 (2013.01); H01L 45/14 (2013.01); H01L 45/141 (2013.01); H01L 45/142 (2013.01); H01L 45/143 (2013.01); H01L 45/144 (2013.01); H01L 45/145 (2013.01); H01L 45/147 (2013.01); H01L 45/148 (2013.01); H01L 45/149 (2013.01); H01L 45/165 (2013.01); H01L 45/1608 (2013.01); H01L 45/1616 (2013.01); H01L 45/1625 (2013.01); H01L 45/1633 (2013.01); H01L 45/1641 (2013.01); H01L 45/1658 (2013.01); H01L 45/1666 (2013.01); H01L 45/1691 (2013.01);
Abstract

The present disclosure, in some embodiments, relates to a memory device. The memory device includes a bottom electrode via and a bottom electrode over a top of the bottom electrode via. A data storage layer is over the bottom electrode and a top electrode is over the data storage layer. A top electrode via is on an upper surface of the top electrode and is centered along a first line that is laterally offset from a second line centered upon a bottommost surface of the bottom electrode via. The first line is perpendicular to the upper surface of the top electrode and parallel to the second line.

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