The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2020
Filed:
Jan. 19, 2018
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Yi-Hsiu Chen, Hsinchu, TW;
Ebin Liao, Hsin-Chu, TW;
Hong-Ye Shih, New Taipei, TW;
Wen-Chih Chiou, Miaoli County, TW;
Jia-Ling Ko, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 21/56 (2006.01); H01L 25/00 (2006.01); H01L 23/544 (2006.01); H01L 21/822 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 21/56 (2013.01); H01L 21/565 (2013.01); H01L 21/8221 (2013.01); H01L 23/544 (2013.01); H01L 25/50 (2013.01); H01L 23/3121 (2013.01); H01L 2223/5446 (2013.01); H01L 2223/54426 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06558 (2013.01); H01L 2225/06582 (2013.01);
Abstract
Provided is a 3DIC structure includes a wafer, a die and a dielectric layer. The die is over and bonded to the wafer. The dielectric layer is over the wafer and aside the die, covering sidewalls of the die. A total thickness variation (TTV) of the die is less than 0.8 μm.