The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Jun. 11, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Zhiqiang Xie, Meridian, ID (US);

Chris M. Carlson, Nampa, ID (US);

Justin B. Dorhout, Boise, ID (US);

Anish A. Khandekar, Boise, ID (US);

Greg Light, Meridian, ID (US);

Ryan Meyer, Boise, ID (US);

Kunal R. Parekh, Boise, ID (US);

Dimitrios Pavlopoulos, Glendale, CA (US);

Kunal Shrotri, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 21/02 (2006.01); H01L 27/11556 (2017.01); H01L 21/28 (2006.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01); H01L 27/11565 (2017.01); H01L 27/11519 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/0228 (2013.01); H01L 21/02164 (2013.01); H01L 21/02271 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/02595 (2013.01); H01L 27/11556 (2013.01); H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); H01L 21/0214 (2013.01); H01L 21/0217 (2013.01); H01L 21/02178 (2013.01); H01L 21/02181 (2013.01); H01L 21/31111 (2013.01); H01L 21/32133 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01);
Abstract

An array of elevationally-extending strings of memory cells comprises a vertical stack of alternating insulative tiers and wordline tiers. The wordline tiers have terminal ends corresponding to control-gate regions of individual memory cells. The control-gate regions individually comprise part of a wordline in individual of the wordline tiers. A charge-blocking region of the individual memory cells extends elevationally along the individual control-gate regions. Charge-storage material of the individual memory cells extends elevationally along individual of the charge-blocking regions. Channel material extends elevationally along the vertical stack. Insulative charge-passage material is laterally between the channel material and the charge-storage material. Elevationally-extending walls laterally separate immediately-laterally-adjacent of the wordlines. The walls comprise laterally-outer insulative material and silicon-containing material spanning laterally between the laterally-outer insulative material. The silicon-containing material comprises at least 30 atomic percent of at least one of elemental-form silicon or a silicon-containing alloy. Other aspects, including method, are also disclosed.


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