The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 2020
Filed:
Jun. 22, 2018
Micromaterials Llc, Wilmington, DE (US);
Ying Zhang, Santa Clara, CA (US);
Regina Freed, Los Altos, CA (US);
Nitin K. Ingle, Santa Clara, CA (US);
Ho-yung Hwang, Cupertino, CA (US);
Uday Mitra, Cupertino, CA (US);
Abhijit Basu Mallick, Palo Alto, CA (US);
Sanjay Natarajan, Portland, OR (US);
Micromaterials LLC, Wilmington, DE (US);
Abstract
Methods and apparatus to form fully self-aligned vias are described. First conductive lines are recessed in a first insulating layer on a substrate. A first metal film is formed in the recessed first conductive lines and pillars are formed from the first metal film. Some of the pillars are selectively removed and a second insulating layer is deposited around the remaining pillar. The remaining pillars are removed to form vias in the second insulating layer. A third insulating layer is deposited in the vias and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer. The third insulating layer is etched from the filled vias to form a via opening to the first conductive line.