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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10535554 B1

PDFFull Text
Date of Patent:
Jan. 14, 2020

Filed:

Oct. 05, 2017

Semiconductor die having edge with multiple gradients and method for forming the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yu-Sheng Tang, Hsinchu, TW;

Fu-Chen Chang, Hsinchu, TW;

Cheng-Lin Huang, Hsinchu, TW;

Chun-Yen Lo, Hsinchu, TW;

Wen-Ming Chen, Zhunan Township, Miaoli County, TW;

Kuo-Chio Liu, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, Taiwan, CN;

Attorney:

McClure, Qualey & Rodack, LLP

Primary Examiner:

Brian Turner

Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/522 (2006.01); H01L 21/304 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 21/683 (2006.01); H01L 21/67 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 21/78 (2006.01); H01L 23/498 (2006.01); H01L 25/10 (2006.01); H01L 23/58 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76802 (2013.01); H01L 21/304 (2013.01); H01L 21/3043 (2013.01); H01L 21/67011 (2013.01); H01L 21/67092 (2013.01); H01L 21/67132 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 23/48 (2013.01); H01L 23/481 (2013.01); H01L 24/11 (2013.01); H01L 24/32 (2013.01); H01L 23/49816 (2013.01); H01L 23/562 (2013.01); H01L 23/585 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01);
Abstract

A method for sawing a semiconductor wafer is provided. The method includes sawing a semiconductor wafer to form a first opening. In addition, the semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape by a die attach film (DAF), and the first opening is formed in an upper portion of the substrate. The method further includes sawing through the substrate and the DAF of the semiconductor wafer from the first opening to form a middle opening under the first opening and a second opening under the middle opening, so that the semiconductor wafer is divided into two dies. In addition, a slope of a sidewall of the middle opening is different from slopes of sidewalls of the first opening and the second opening.

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