The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2019
Filed:
Aug. 29, 2018
Micromaterials Llc, Wilmington, DE (US);
Ying Zhang, Santa Clara, CA (US);
Abhijit Basu Mallick, Palo Alto, CA (US);
Yung-Chen Lin, Gardena, CA (US);
Qingjun Zhou, San Jose, CA (US);
He Ren, San Jose, CA (US);
Ho-yung David Hwang, Cupertino, CA (US);
Uday Mitra, Cupertino, CA (US);
Mirocmaterials LLC, Wilmington, DE (US);
Abstract
Methods and apparatus to form fully self-aligned vias are described. A first metal film is formed in the recessed first conductive lines and on the first insulating layer of a substrate comprising alternating conductive lines and a first insulating layer. Pillars and a sheet are formed from the first metal film. Some of the pillars and a portion of the sheet are selectively removed and a second insulating layer is deposited around the remaining pillars and sheet. The remaining pillars and sheet are removed to form vias and a trench in the second insulating layer. A third insulating layer is deposited in the vias and trench and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer. The third insulating layer is selectively etched from some of the filled vias to form via openings to the first conductive line and a trench.