The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Jan. 30, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Mao-Yen Chang, Kaohsiung, TW;

Hao-Yi Tsai, Hsinchu, TW;

Kuo-Lung Pan, Hsinchu, TW;

Tin-Hao Kuo, Hsinchu, TW;

Tzung-Hui Lee, New Taipei, TW;

Teng-Yuan Lo, Hsinchu, TW;

Hao-Chun Ting, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/4857 (2013.01); H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/49838 (2013.01); H01L 23/49866 (2013.01); H01L 25/105 (2013.01); H01L 2225/1058 (2013.01);
Abstract

Semiconductor package s and methods of forming the same are disclosed. The semiconductor package includes a chip, a redistribution circuit structure and a UBM pattern. The redistribution circuit structure is disposed over and electrically connected to the chip and includes a topmost conductive pattern. The UBM pattern is disposed over and electrically connected to the topmost conductive pattern, wherein the UBM pattern includes a set of vias and a pad on the set of vias, wherein the vias are arranged in an array and electrically connected to the pad and the topmost conductive pattern.


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