The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2019
Filed:
May. 17, 2018
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Albert Wan, Hsinchu, TW;
Ching-Hua Hsieh, Hsinchu, TW;
Chung-Hao Tsai, Changhua County, TW;
Chuei-Tang Wang, Taichung, TW;
Chao-Wen Shih, Hsinchu County, TW;
Han-Ping Pu, Taichung, TW;
Chien-Ling Hwang, Hsinchu, TW;
Pei-Hsuan Lee, Tainan, TW;
Tzu-Chun Tang, Kaohsiung, TW;
Yu-Ting Chiu, Hsinchu County, TW;
Jui-Chang Kuo, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A dielectric layer and a core material layer are sequentially formed on a first carrier. A portion of the core material layer is removed to form a core layer having a plurality of cavities. The first carrier, the dielectric layer, and the core layer are attached onto the package array such that the core layer is located between the dielectric layer and the package array. The first carrier is removed from the dielectric layer. A plurality of first conductive patches is formed on the dielectric layer above the cavities.