The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2019
Filed:
Jan. 02, 2018
United Microelectronics Corp., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Mei-Ling Chen, Kaohsiung, TW;
Wei-Hsin Liu, Changhua County, TW;
Yi-Wei Chen, Taichung, TW;
Ching-Hsiang Chang, Tainan, TW;
Jui-Min Lee, Taichung, TW;
Chia-Lung Chang, Tainan, TW;
Tzu-Chin Wu, Chiayi County, TW;
Shih-Fang Tzou, Tainan, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Abstract
The present invention provides a method for forming an amorphous silicon multiple layer structure, the method comprises the flowing steps: first, a substrate material layer is provided, next, a first amorphous silicon layer is formed on the substrate material layer, wherein the first amorphous silicon layer includes a plurality of hydrogen atoms disposed therein, afterwards, an UV curing process is performed to the first amorphous silicon layer, so as to remove the hydrogen atoms from the first amorphous silicon layer, finally, a second amorphous silicon layer is formed on the first amorphous silicon layer.