The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2018
Filed:
Jun. 16, 2017
Applicant:
Intel Corporation, Stanta Clara, CA (US);
Inventors:
Suman Datta, Beaverton, OR (US);
Mantu K. Hudait, Portland, OR (US);
Mark L. Doczy, Beaverton, OR (US);
Jack T. Kavalieros, Portland, OR (US);
Amlan Majumdar, Portland, OR (US);
Justin K. Brask, Portland, OR (US);
Been-Yih Jin, Lake Oswego, OR (US);
Matthew V. Metz, Hillsboro, OR (US);
Robert S. Chau, Beaverton, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/15 (2006.01); H01L 29/205 (2006.01); H01L 29/51 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7784 (2013.01); H01L 27/092 (2013.01); H01L 29/157 (2013.01); H01L 29/205 (2013.01); H01L 29/517 (2013.01); H01L 29/66462 (2013.01);
Abstract
A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.