The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2018
Filed:
Jan. 20, 2017
Intel Corporation, Santa Clara, CA (US);
Seiyon Kim, Portland, OR (US);
Kelin J. Kuhn, Aloha, OR (US);
Tahir Ghani, Portland, OR (US);
Anand S. Murthy, Portland, OR (US);
Annalisa Cappellani, Portland, OR (US);
Stephen M. Cea, Hillsboro, OR (US);
Rafael Rios, Portland, OR (US);
Glenn A. Glass, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.