Gunma, Japan

Yuuji Tobisaka

This inventor holds 32 USPTO granted patents and 9 published patent applications and 15 EPO patents, primarily in Semiconductor Manufacturing. Top assignees: Shin-Etsu Chemical Co., Ltd., Shin-Etsu Chemical C O., Ltd., Other. Active years: 2003-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yuuji Tobisaka. Retrieved from https://idiyas.com/inventor/yuuji-tobisaka

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 32 

% Patents Active = 68.8

 

Average Co-Inventor Count = 5.7

ph-index = 4

Forward Citations = 50(Granted Patents)


Location History:

  • Annaka, JP (2003 - 2010)
  • Gunma-ken, JP (2007 - 2010)
  • Gunma, JP (2009 - 2015)

Company Filing History:


Years Active: 2003-2015

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Areas of Expertise:
SOI Substrate
Silicon Solar Cell
Semiconductor Substrate
Laminated Substrate
Glass Base Material
Optical Waveguide
Single Crystal Silicon
Pyrolytic Boron Nitride
Photoelectric Conversion
Non-Circularity Measurement
Glass Base Material Device
OVD Apparatus
32 patents (USPTO):Explore Patents

Title: Innovations and Contributions of Yuuji Tobisaka in Semiconductor Technology

Introduction: Yuuji Tobisaka, based in Gunma, Japan, is a prolific inventor known for his remarkable contributions to semiconductor technology. With a portfolio comprising 32 patents, his innovative approaches have significantly influenced the manufacturing processes in the semiconductor industry.

Latest Patents: Tobisaka's latest patent, titled "Method for Reducing the Thickness of an SOI Layer," outlines a sophisticated technique for producing silicon-on-insulator (SOI) wafers. It includes steps such as implanting hydrogen ions or rare gas ions into a donor wafer, bonding it to a handle wafer, and performing precise etching to achieve high film thickness uniformity. The method promises excellent productivity and efficiency in manufacturing SOI layers, making it a noteworthy advancement in semiconductor fabrication. Another significant patent from Tobisaka is focused on the "Process for Producing Laminated Substrate and Laminated Substrate." This method involves forming an oxide film on a high-hardness substrate, implanting ions, and creating a laminated substrate that undergoes heat treatment to enhance its properties.

Career Highlights: Yuuji Tobisaka has made significant strides in his career, particularly during his tenure at Shin-Etsu Chemical Co., Ltd. His innovative methodologies and dedication to research have played a crucial role in enhancing the performance of semiconductor materials and devices, which are essential for modern electronic systems.

Collaborations: Throughout his career, Tobisaka has collaborated with notable figures in the field, including Shoji Akiyama and Atsuo Ito. These collaborations have fostered an environment of innovation and have contributed to the advancements found in Tobisaka’s numerous patents.

Conclusion: Yuuji Tobisaka’s contributions to the semiconductor industry, marked by his 32 patents, highlight his role as a leading innovator. His latest patents demonstrate a commitment to enhancing manufacturing processes for SOI wafers and laminated substrates. As technology evolves, his work will undoubtedly continue to influence future innovations in semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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