Kaohsiung, Taiwan

Yung-Hsiang Chen

This inventor holds 5 USPTO granted patents and 5 published patent applications. Top assignee: Walton Advanced Engineering Inc.. Active years: 2010-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yung-Hsiang Chen. Retrieved from https://idiyas.com/inventor/yung-hsiang-chen-iwrf7fhg

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 5 

% Patents Active = 20.0

Average Co-Inventor Count = 2.5

ph-index = 2

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2010-2014

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5 patents (USPTO):Explore Patents

Title: Innovations by Yung-Hsiang Chen in the Semiconductor Industry

Introduction

Yung-Hsiang Chen, an accomplished inventor based in Kaohsiung, Taiwan, has significantly contributed to the field of semiconductor technology with a total of five patents. His work focuses on enhancing the efficiency and reliability of multi-chip stacking processes, which are vital in the ever-evolving electronics industry.

Latest Patents

Among his latest innovations is a **multi-chip stacking method to reduce voids between stacked chips**. This effective method involves placing a first chip on a substrate and using bonding wires for electrical connection. The second chip is positioned on the first chip, utilizing a film over wire (FOW) adhesive that encapsulates the bonding wires to enhance adhesion. A pressure oven is then used to cure the FOW adhesive under controlled conditions, minimizing voids and preventing adhesion issues.

Another notable patent is the **mold array process method to encapsulate substrate cut edges**. This innovative technique offers a solution for encapsulating substrate units arranged in a matrix, with pre-cut grooves facilitating the filling of encapsulant. This process ensures improved moisture resistance for individual semiconductor packages by preventing exposure to plated traces, which is crucial for the long-term reliability of these components.

Career Highlights

Yung-Hsiang Chen is currently associated with Walton Advanced Engineering Inc., where his expertise in semiconductor packaging technologies is utilized to push the boundaries of innovation in the industry. His career reflects a commitment to improving both design and function in semiconductor manufacturing.

Collaborations

Throughout his journey, Yung-Hsiang has collaborated with notable colleagues, including Kuo-Yuan Lee and Wen-Chun Chiu. Their shared efforts have contributed to advancing technologies that align with modern requirements in semiconductor reliability and efficiency.

Conclusion

Yung-Hsiang Chen's contributions to semiconductor technology are marked by his inventive spirit and dedication to enhancing industry standards. With each patent, he has played a critical role in shaping the future of multi-chip stacking processes and encapsulation techniques, underscoring the importance of innovation in today's technological landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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