IDiyas

For the Inventor, By the Inventor

Taipei, Taiwan

Yueh-Ting Lin

USPTO Granted Patents = 12

Average Co-Inventor Count = 5.7

ph-index = 3

Forward Citations = 20(Granted Patents)


Location History:

  • Hsin-Chu, TW (2020)
  • Taipei, TW (2020 - 2024)

Company Filing History:

goldMedal12 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2020-2025

where 'Filed Patents' based on already Granted Patents

12 patents (USPTO):
1. 12211782 - Semiconductor package dielectric susbtrate including a trench (2025-01-28),
2. 12159853 - Package structure including IPD and method of forming the same (2024-12-03),
3. 11984410 - Air channel formation in packaging process (2024-05-14),
4. 11961796 - Semiconductor package dielectric substrate including a trench (2024-04-16),
5. 11682637 - Air channel formation in packaging process (2023-06-20),
6. 11587900 - Package structure including IPD and method of forming the same (2023-02-21),
7. 11177142 - Method for dicing integrated fan-out packages without seal rings (2021-11-16),
8. 11088094 - Air channel formation in packaging process (2021-08-10),
9. 10867928 - Semiconductor device and manufacturing method thereof (2020-12-15),
10. 10756037 - Package structure and fabricating method thereof (2020-08-25),
11. 10720409 - Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same (2020-07-21),
12. 10672741 - Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same (2020-06-02),

Title: Innovations by Yueh-Ting Lin in Semiconductor Technology

Introduction

Yueh-Ting Lin is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. His work focuses on enhancing the performance and reliability of semiconductor packages.

Latest Patents

One of his latest patents is titled "Semiconductor package dielectric substrate including a trench." This invention involves a package that comprises at least one first device die and a redistribution line (RDL) structure. The RDL structure features multiple dielectric layers and RDLs formed through these layers. A trench is defined near the axial edges of the RDL structure, which helps prevent damage to the RDL structure's inner portions. Another notable patent is "Package structure including IPD and method of forming the same." This patent describes a package structure that includes a die, an encapsulant, and a first RDL structure. The structure also features an integrated passive device (IPD) and an underfill layer, which enhances the overall functionality and durability of the semiconductor package.

Career Highlights

Yueh-Ting Lin works at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His innovative designs and patents have contributed to advancements in semiconductor packaging technology, making significant impacts on the industry.

Collaborations

He collaborates with talented coworkers, including Li-Hsien Huang and Der-Chyang Yeh, who contribute to the development of cutting-edge semiconductor technologies.

Conclusion

Yueh-Ting Lin's work in semiconductor technology exemplifies innovation and dedication to improving electronic components. His patents reflect a commitment to advancing the field and enhancing the performance of semiconductor packages.

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