Yu-Ting Hsiao

Title: Innovations of Yu-Ting Hsiao

Introduction

Yu-Ting Hsiao is a prominent inventor based in Tainan, Taiwan. She has made significant contributions to the field of semiconductor technology, particularly in the development of FinFET structures. With a total of 3 patents to her name, her work has garnered attention in the industry.

Latest Patents

One of her latest patents is focused on a FinFET design. This FinFET includes a fin structure, a gate, a source-drain region, and an inter layer dielectric (ILD). The gate crosses over the fin structure, while the source-drain region is integrated within the fin structure. Notably, the ILD is laterally adjacent to the gate and contains a dopant, with a lower dopant concentration adjacent to the gate compared to the concentration further away. Another patent details a method of forming a gate and FinFET. This method involves forming a dummy gate, creating an ILD adjacent to the dummy gate, and doping a dopant into both the dummy gate and the ILD. The process includes removing the dummy gate to create a cavity and subsequently forming the gate within that cavity.

Career Highlights

Yu-Ting Hsiao is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. Her innovative work has positioned her as a key player in advancing semiconductor technologies.

Collaborations

She collaborates with notable colleagues, including Cheng-Ta Wu and Lun-Kuang Tan, who contribute to her research and development efforts.

Conclusion

Yu-Ting Hsiao's contributions to semiconductor technology through her patents and collaborations highlight her role as an influential inventor in the field. Her work continues to shape the future of semiconductor innovations.