IDiyas

For the Inventor, By the Inventor

Tokyo, Japan

Yoshie Nakabayashi

USPTO Granted Patents = 10 

Average Co-Inventor Count = 4.1

ph-index = 3

Forward Citations = 12(Granted Patents)


Company Filing History:

goldMedal10 out of 2,861 
 
Rambus Inc.
 patents

Years Active: 2019-2024

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10 patents (USPTO):
1. 12141081 - Training and operations with a double buffered memory topology (2024-11-12),
2. 11907139 - Memory system design using buffer(s) on a mother board (2024-02-20),
3. 11768780 - Training and operations with a double buffered memory topology (2023-09-26),
4. 11537540 - Memory system design using buffer(s) on a mother board (2022-12-27),
5. 11294830 - Training and operations with a double buffered memory topology (2022-04-05),
6. 11003601 - Memory system design using buffer(s) on a mother board (2021-05-11),
7. 10614002 - Memory system design using buffer(S) on a mother board (2020-04-07),
8. 10613995 - Training and operations with a double buffered memory topology (2020-04-07),
9. 10255220 - Dynamic termination scheme for memory communication (2019-04-09),
10. 10169258 - Memory system design using buffer(s) on a mother board (2019-01-01),

Title: Innovator Spotlight: Yoshie Nakabayashi

Introduction

Yoshie Nakabayashi, a prominent inventor based in Tokyo, Japan, has made significant contributions to the field of memory systems design. With a remarkable portfolio of 10 patents, she stands out as a leading figure in innovative technology development. Nakabayashi's work primarily focuses on enhancing training and operational efficiencies in memory topology systems.

Latest Patents

Among her latest patents, Nakabayashi has developed groundbreaking technologies such as:

1. **Training and operations with a double buffered memory topology** - This patent addresses systems and methods for training and performing operations on a double buffered memory topology. It discusses configurations that allow for efficient timing and signaling for read and write operations.

2. **Memory system design using buffer(s) on a mother board** - This invention details a motherboard topology that optimally couples processors to communication channels, enhancing the efficiency of data transfer through buffered configurations.

Career Highlights

Throughout her career at Rambus Inc., Nakabayashi has established herself as a visionary in memory system technologies. Her innovative designs and concepts have significantly influenced the industry, contributing to advancements in computer architecture and performance.

Collaborations

Yoshie Nakabayashi collaborates with notable colleagues such as Chi-Ming Yeung and Henry Stracovsky. Together, they work towards creating cutting-edge technologies that push the boundaries of memory system design.

Conclusion

Yoshie Nakabayashi's impressive portfolio and dedication to innovation in memory technology underscore her status as a leading inventress in her field. As she continues to pioneer new advancements, her contributions will likely shape the future of memory systems and influence future generations of inventors.

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