The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2023
Filed:
Mar. 31, 2022
Applicant:
Rambus Inc., San Jose, CA (US);
Inventors:
Chi-Ming Yeung, Cupertino, CA (US);
Yoshie Nakabayashi, Tokyo, JP;
Thomas Giovannini, San Jose, CA (US);
Henry Stracovsky, Portland, OR (US);
Assignee:
Rambus Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G11C 5/02 (2006.01); G11C 5/04 (2006.01); H03K 19/1778 (2020.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G06F 13/16 (2013.01); G11C 5/02 (2013.01); G11C 5/04 (2013.01); G11C 7/10 (2013.01); H03K 19/1778 (2013.01);
Abstract
System and method for training and performing operations (e.g., read and write operations) on a double buffered memory topology. In some embodiments, eight DIMMs are coupled to a single channel. The training and operations schemes are configured with timing and signaling to allow training and operations with the double buffered memory topology. In some embodiments, the double buffered memory topology includes one or more buffers on a system board (e.g., motherboard).