Thomas J Giovannini

This inventor holds 67 USPTO granted patents and 8 published patent applications and 5 EPO patents, primarily in Memory System Design (CPC class G11C). Top assignees: Rambus Inc., Intel Corporation. Active years: 2007-2026.

USPTO Granted Patents = 67 (Patent Applications = 8)

% Patents Active = 94.0

EPO Patents = 5 (Patent Applications = 3)

Average Co-Inventor Count = 3.5

ph-index = 8

Forward Citations = 257(Granted Patents)

Forward Citations (Not Self Cited) = 230(Dec 10, 2025)

Inventors with similar research interests:

Company Filing History:

Years Active: 2007-2026

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Areas of Expertise:

Memory System Design

DRAM Components

Decision Feedback Equalization

High-Performance Memory

Variable-Width Data Ranks

Configurable Data-Rank Timing

Buffering Techniques

Timing Reference Signals

Adaptive Memory Circuits

Skew-Tolerant Gating

Memory Module Access

Double Buffered Topology

67 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12658236 - Method and apparatus for calibrating write timing in a memory system (2026-06-16),

2. 12626740 - Signal receiver with skew-tolerant strobe gating (2026-05-12),

3. 12536110 - Memory system design using buffer(s) on a mother board (2026-01-27),

4. 12463849 - Burst-tolerant decision feedback equalization (2025-11-04),

5. 12436907 - Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules (2025-10-07),

6. 12386763 - Protocol including selective output by memory of a timing reference signal (2025-08-12),

7. 12314162 - Circuits and methods for self-adaptive decision-feedback equalization in a memory system (2025-05-27),

8. 12298926 - High-performance, high-capacity memory systems and modules (2025-05-13),

9. 12298842 - Memory module register access (2025-05-13),

10. 12210467 - Memory modules and systems with variable-width data ranks and configurable data-rank timing (2025-01-28),

11. 12141081 - Training and operations with a double buffered memory topology (2024-11-12),

12. 12136452 - Method and apparatus for calibrating write timing in a memory system (2024-11-05),

13. 12062413 - Signal receiver with skew-tolerant strobe gating (2024-08-13),

14. 11953981 - Memory module register access (2024-04-09),

15. 11949539 - Burst-tolerant decision feedback equalization (2024-04-02),

Title: The Innovative Journey of Inventor Thomas J Giovannini

Introduction:

Thomas J Giovannini, a prolific inventor based in San Jose, CA, has left a significant mark on the tech industry with his groundbreaking patents and contributions to companies like Rambus Inc. and Intel Corporation.

Latest Patents:

Among his 53 patents, some of Thomas J Giovannini's latest innovations include a Memory module register access system, where each device on a memory module is configured uniquely for efficient access, and Burst-tolerant decision feedback equalization, enhancing signal receiver performance.

Career Highlights:

With a portfolio of 53 patents, Thomas J Giovannini has proven himself as a visionary in the field of technology. His inventions have not only demonstrated technical prowess but also a deep understanding of practical applications in the real world.

Collaborations:

During his tenure at Rambus Inc. and Intel Corporation, Thomas J Giovannini collaborated with esteemed professionals like Ian P Shaeffer and John Eric Linstadt. Together, they worked on cutting-edge projects that pushed the boundaries of innovation.

Conclusion:

Inventor Thomas J Giovannini's exceptional contributions to the tech industry through his patents and collaborations exemplify his commitment to driving advancements in technology. His innovative spirit continues to inspire and pave the way for future inventors in the field.