The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2019

Filed:

Mar. 15, 2016
Applicant:

Rambus Inc., Sunnyvale, CA (US);

Inventors:

Chi-Ming Yeung, Cupertino, CA (US);

Yoshie Nakabayashi, Tokyo, JP;

Thomas Giovannini, San Jose, CA (US);

Henry Stracovsky, Portland, OR (US);

Assignee:

Rambus Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/20 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 13/4022 (2013.01); G06F 13/4068 (2013.01); G06F 13/4282 (2013.01);
Abstract

A mother board topology including a processor operable to be coupled to one or more communication channels for communicating commands. The topology includes a first communication channel electrically coupling a first set of two or more dual in-line memory modules (DIMMs) and a first primary data buffer on a mother board. The topology includes a second communication channel electrically coupling a second set of two or more DIMMs and a second primary data buffer on the mother board. The topology includes a third channel electrically coupling the first primary data buffer, the primary second data buffer, and the processor.


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