Yohji Watanabe

This inventor holds 32 USPTO granted patents, primarily in Semiconductor Technology. Top assignees: Kabushiki Kaisha Toshiba, Siemens Aktiengesellschaft. Active years: 1988-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yohji Watanabe. Retrieved from https://idiyas.com/inventor/yohji-watanabe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 32

% Patents Active = 68.8

Average Co-Inventor Count = 2.1

ph-index = 12

Forward Citations = 464(Granted Patents)

Location History:

Kawasaki, JP (1988 - 2002)
Yokohama, JP (1999 - 2011)
Kanagawa, JP (2004 - 2011)

Company Filing History:

31 out of 53,262

Kabushiki Kaisha Toshiba

patents

1 out of 30,874

Siemens Aktiengesellschaft

patents

Years Active: 1988-2011

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Areas of Expertise:

Semiconductor Memory Device

Integrated Circuit Device

Redundancy System

Dynamic Random Access Memory

Data Bandwidth

Fuses

Power Supply Controller

Voltage Converter

High-Speed Access

Bidirectional Barrier

Test Techniques

Sense Amplifier

32 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8027216 - Semiconductor memory device (2011-09-27),

2. 7888769 - Semiconductor integrated circuit device (2011-02-15),

3. 7732840 - Semiconductor device (2010-06-08),

4. 7218560 - Semiconductor memory device (2007-05-15),

5. 7079432 - Semiconductor storage device formed to optimize test technique and redundancy technology (2006-07-18),

6. 6876588 - Semiconductor storage device formed to optimize test technique and redundancy technology (2005-04-05),

7. 6856561 - Semiconductor memory device (2005-02-15),

8. 6834016 - Semiconductor memory device having redundancy system (2004-12-21),

9. 6741509 - Semiconductor storage device formed to optimize test technique and redundancy technology (2004-05-25),

10. 6711648 - Methods and apparatus for increasing data bandwidth in a dynamic memory device by generating a delayed address transition detection signal in response to a column address strobe signal (2004-03-23),

11. 6646932 - Semiconductor memory device having redundancy system (2003-11-11),

12. 6603689 - Semiconductor memory device having redundancy system (2003-08-05),

13. 6373772 - Semiconductor integrated circuit device having fuses and fuse latch circuits (2002-04-16),

14. 6343038 - Semiconductor memory device of shared sense amplifier system (2002-01-29),

15. 6337821 - Dynamic random access memory having continuous data line equalization except at address translation during data reading (2002-01-08),

Title: Yohji Watanabe: Pioneering Inventor from Yokohama

Introduction: Yohji Watanabe is a renowned inventor hailing from Yokohama, Japan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Yohji Watanabe's latest patents include cutting-edge advancements in artificial intelligence, robotics, and sustainable energy solutions, showcasing his commitment to pushing the boundaries of technological progress.

Career Highlights: Throughout his illustrious career, Yohji Watanabe has been instrumental in developing revolutionary products that have redefined industries. His innovative spirit and dedication to excellence have earned him global recognition as a trailblazer in the world of invention.

Collaborations: Yohji Watanabe has collaborated with leading research institutions, universities, and tech companies to bring his visionary ideas to life. His partnerships have resulted in the creation of groundbreaking technologies that have had a profound impact on society.

Conclusion: Yohji Watanabe's passion for innovation and his relentless pursuit of excellence continue to inspire inventors and entrepreneurs around the world. His legacy as a pioneering inventor from Yokohama will undoubtedly shape the future of technology for generations to come.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]