This inventor holds 4 USPTO granted patents. Top assignees: Cadence Design Systems, Inc., Synopsys, Inc., Versity Design, Inc.. Active years: 2009-2026.
Company Filing History:
2 out of 2,617 
1 out of 2,593 
1 out of 1 Years Active: 2009-2026
Title: Innovations by Inventor Yogesh Goel
Introduction
Yogesh Goel is a notable inventor based in Fremont, CA (US). He has made significant contributions to the field of circuit design and verification. With a total of 4 patents, his work focuses on enhancing the efficiency and reliability of electronic systems.
Latest Patents
One of his latest patents is titled "Method and system for reproducing prototyping failures in emulation." This method involves simulating a circuit by running a first prototype a predetermined number of cycles behind a second prototype, while utilizing a hardware emulator based on input traces from both prototypes. Another significant patent is "Method and apparatus for processing assertions in assertion-based verification of a logic design." This invention describes a process for evaluating assertions during the verification of a logic design, utilizing an evaluation engine that encodes the temporal behavior of the logic design required by the assertion.
Career Highlights
Yogesh Goel has worked with prominent companies in the industry, including Synopsys, Inc. and Versity Design, Inc. His experience in these organizations has allowed him to develop innovative solutions that address complex challenges in circuit design and verification.
Collaborations
Throughout his career, Yogesh has collaborated with talented individuals such as Ping-Sheng Tseng and Amy Lim. These collaborations have contributed to the advancement of his inventions and the overall progress in the field.
Conclusion
Yogesh Goel's contributions to the field of circuit design and verification through his patents and collaborations highlight his innovative spirit and dedication to advancing technology. His work continues to influence the industry and inspire future innovations.