IDiyas

For the Inventor, By the Inventor

Bengaluru, India

Yogananda Sarode Vishwanath

USPTO Granted Patents = 30 

Average Co-Inventor Count = 2.8

ph-index = 4

Forward Citations = 200(Granted Patents)


Location History:

  • Karnataka, IN (2016)
  • Bengaluru, IN (2017 - 2024)

Company Filing History:

goldMedal29 out of 13,684 
 
Applied Materials, Inc.
 patents
silverMedal1 out of 832,680 
Other
 patents

Years Active: 2016-2025

where 'Filed Patents' based on already Granted Patents

30 patents (USPTO):
1. 12459071 - Cooling base for a substrate support (2025-11-04),
2. 12444644 - Lift pin assembly (2025-10-14),
3. 12165905 - Process kit enclosure system (2024-12-10),
4. 12100576 - Metal oxide preclean chamber with improved selectivity and flow conductance (2024-09-24),
5. 12094752 - Wafer edge ring lifting solution (2024-09-17),
6. 12002703 - Lift pin assembly (2024-06-04),
7. 11913777 - Detector for process kit ring wear (2024-02-27),
8. 11887879 - In-situ apparatus for semiconductor process module (2024-01-30),
9. 11835146 - Symmetric flow valve for flow conductance control (2023-12-05),
10. 11728143 - Process kit with adjustable tuning ring for edge uniformity control (2023-08-15),
11. 11569114 - Semiconductor processing with cooled electrostatic chuck (2023-01-31),
12. 11437261 - Cryogenic electrostatic chuck (2022-09-06),
13. 11393710 - Wafer edge ring lifting solution (2022-07-19),
14. 11373893 - Cryogenic electrostatic chuck (2022-06-28),
15. 11201037 - Process kit with adjustable tuning ring for edge uniformity control (2021-12-14),

Title: Yogananda Sarode Vishwanath: Innovator in Wafer Processing Technology

Introduction

Yogananda Sarode Vishwanath is a prolific inventor based in Bengaluru, India, renowned for his significant contributions to wafer processing technology. With an impressive portfolio of 28 patents, he has made a notable impact in the field of semiconductor manufacturing.

Latest Patents

Among his latest patents, two stand out for their innovation and practicality. The first is a **Process Kit Enclosure System**, which features surfaces designed to enclose an interior volume. This system includes a first support structure with fins and a second support structure that also features fins. It effectively interfaces with a load port of a wafer processing system, allowing for automated transfers of process kit ring carriers. This innovation streamlines the handling of process kit rings, enhancing the efficiency of wafer processing.

The second noteworthy patent is the **Metal Oxide Preclean Chamber with Improved Selectivity and Flow Conductance**. This design incorporates a chamber liner with a tubular body and a confinement plate that includes multiple slots. The chamber is equipped with a shield ring that can move while maintaining electrical connections via ground straps. This design improves operational efficiency within the process chamber, making it a vital advancement in the field.

Career Highlights

Yogananda has worked with esteemed organizations, including Applied Materials, Inc., where he has been instrumental in the development of cutting-edge technology in semiconductor fabrication. His innovative spirit and technical prowess have allowed him to achieve recognition in a competitive landscape.

Collaborations

Throughout his career, Yogananda has collaborated with talented individuals such as Andrew Nguyen and Steven E. Babayan. These collaborations exemplify the teamwork and shared vision that drive innovation in the tech industry.

Conclusion

Yogananda Sarode Vishwanath's contributions to wafer processing technology underscore his status as a leader in the field of semiconductor innovation. With a robust collection of patents and a dedication to advancing technology, he continues to influence the industry and inspire future inventors.

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