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For the Inventor, By the Inventor

Hsinchu, Taiwan

Yi-Che Chiang

USPTO Granted Patents = 13 

Average Co-Inventor Count = 4.5

ph-index = 2

Forward Citations = 14(Granted Patents)


Company Filing History:

goldMedal13 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2019-2025

where 'Filed Patents' based on already Granted Patents

13 patents (USPTO):
1. 12406941 - Dielectric slots underneath conductive vias in interconnect structure of semiconductor package and method of forming the same (2025-09-02),
2. 12362275 - Method of fabricating package structure including a plurality of antenna patterns (2025-07-15),
3. 12021024 - Semiconductor device including a semiconductor die and a plurality of antenna patterns (2024-06-25),
4. 11705411 - Chip package with antenna element (2023-07-18),
5. 11532576 - Semiconductor package and manufacturing method thereof (2022-12-20),
6. 11444023 - Semiconductor device, package structure including a heat dissipation element having a conductive base and a plurality of antenna patterns and method of fabricating the semiconductor device (2022-09-13),
7. 11373922 - Semiconductor packages having thermal through vias (TTV) (2022-06-28),
8. 11018113 - Memory module, semiconductor package including the same, and manufacturing method thereof (2021-05-25),
9. 11004809 - Chip package with antenna element (2021-05-11),
10. 10937719 - Package structure and method of fabricating the same (2021-03-02),
11. 10818588 - Semiconductor device, package structure and method of fabricating the same (2020-10-27),
12. 10748831 - Semiconductor packages having thermal through vias (TTV) (2020-08-18),
13. 10312203 - Structure and formation method of chip package with antenna element (2019-06-04),

Title: Yi-Che Chiang: Innovator in Semiconductor Packaging Technology

Introduction

Yi-Che Chiang is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of 13 patents. His work focuses on innovative methods that enhance the performance and efficiency of semiconductor devices.

Latest Patents

Among his latest patents is a method for creating dielectric slots underneath conductive vias in interconnect structures of semiconductor packages. This method involves depositing a first dielectric layer over a carrier substrate, forming a metallization pattern, and creating a dielectric slot that is laterally positioned under a through via. Another notable patent details a package structure that includes a semiconductor die, insulating encapsulant, and multiple redistribution layers, which are designed to improve heat dissipation and electrical connectivity.

Career Highlights

Yi-Che Chiang is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His expertise in semiconductor packaging has positioned him as a key player in the development of advanced technologies that drive innovation in this field.

Collaborations

He has collaborated with notable colleagues such as Hsin-Yu Pan and Sen-Kuei Hsu, contributing to various projects that aim to push the boundaries of semiconductor technology.

Conclusion

Yi-Che Chiang's work in semiconductor packaging exemplifies the innovative spirit of modern technology. His patents and contributions continue to influence the industry, paving the way for future advancements.

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