The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

May. 30, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Sen-Kuei Hsu, Kaohsiung, TW;

Ching-Feng Yang, Taipei, TW;

Hsin-Yu Pan, Taipei, TW;

Kai-Chiang Wu, Hsinchu, TW;

Yi-Che Chiang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/36 (2006.01); H01L 23/52 (2006.01); H01L 23/538 (2006.01); H01L 23/367 (2006.01); H01L 23/00 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/367 (2013.01); H01L 21/76816 (2013.01); H01L 23/5226 (2013.01); H01L 23/5384 (2013.01); H01L 23/562 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 2224/02379 (2013.01);
Abstract

Semiconductor packages and methods of forming the same are provided. One of the semiconductor package includes a first die, a dummy die, a first redistribution layer structure, an insulating layer and an insulating layer. The dummy die is disposed aside the first die. The first redistribution layer structure is electrically connected to the first die and having connectors thereover. The insulating layer is disposed over the first die and the dummy die and opposite to the first redistribution layer structure. The insulating layer penetrates through the insulating layer.


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