Yee-Wing Hsieh is a notable inventor based in Pleasanton, CA (US). He has made significant contributions to the field of electronic circuit design, holding a total of 3 patents. His work focuses on enhancing the efficiency and effectiveness of design constraints in circuit designs.

Latest Patents

Hsieh's latest patents include a method and system for generating design constraints for electronic circuit design. This innovative method involves reading a design description and an existing design constraint file, configuring design constraint integration rules, writing a new design constraint file, evaluating the results, and replacing the existing design constraint file with the new one. Another significant patent is directed towards verifying multiple constraints for circuit designs. This invention enables comparisons between constrained circuit designs by generating timing graphs, mapping timing constraints, and comparing these constraints across different timing graphs.

Career Highlights

Yee-Wing Hsieh is currently employed at Cadence Design Systems, Inc., where he continues to push the boundaries of electronic design automation. His expertise in generating and verifying design constraints has made a substantial impact on the efficiency of circuit design processes.

Collaborations

Hsieh collaborates with talented professionals in his field, including Angela Krstic and Manish Pandey. Their combined efforts contribute to the innovative projects at Cadence Design Systems, Inc.

Conclusion

Yee-Wing Hsieh's contributions to electronic circuit design through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence the development of more efficient design methodologies.