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For the Inventor, By the Inventor

Cupertino, CA, United States of America

Yaw Wen Hu

This inventor holds 13 USPTO granted patents and 1 published patent application and 1 EPO patent. Top assignees: Silicon Storage Technology, Inc., Vitelic Corporation. Active years: 1988-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yaw Wen Hu. Retrieved from https://idiyas.com/inventor/yaw-wen-hu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13 

% Patents Active = 100.0

 

Average Co-Inventor Count = 3.0

ph-index = 7

Forward Citations = 310(Granted Patents)


Company Filing History:

goldMedal12 out of 655 
 
Silicon Storage Technology, Inc.
 patents
silverMedal1 out of 6 
 
Vitelic Corporation
 patents

Years Active: 1988-2013

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13 patents (USPTO):Explore Patents
1. 8461640 - FIN-FET non-volatile memory cell, and an array and method of manufacturing (2013-06-11),
2. 7974136 - Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio (2011-07-05),
3. 7927994 - Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturing (2011-04-19),
4. 7868375 - Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturing (2011-01-11),
5. 7668013 - Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio (2010-02-23),
6. 7547603 - Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same (2009-06-16),
7. 7537996 - Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gate (2009-05-26),
8. 7129536 - Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same (2006-10-31),
9. 7119396 - NROM device (2006-10-10),
10. 6952034 - Semiconductor memory array of floating gate memory cells with buried source line and floating gate (2005-10-04),
11. 6891220 - Method of programming electrons onto a floating gate of a non-volatile memory cell (2005-05-10),
12. 6822287 - Array of integrated circuit units with strapping lines to prevent punch through (2004-11-23),
13. 4744859 - Process for fabricating lightly doped drain MOS devices (1988-05-17),

Title: The Innovative Journey of Yaw Wen Hu

Introduction: Yaw Wen Hu, a visionary inventor based in Cupertino, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Yaw Wen Hu holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies, showcasing his versatility and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Yaw Wen Hu has worked with leading tech companies, spearheading research and development projects that have led to the creation of cutting-edge products and solutions.

Collaborations: Throughout his career, Yaw Wen Hu has collaborated with top researchers, engineers, and scientists from around the world, fostering a culture of innovation and excellence in all his projects.

Conclusion: Yaw Wen Hu's passion for innovation, coupled with his relentless drive to push the boundaries of technology, continues to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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