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For the Inventor, By the Inventor

Tokyo, Japan

Yasutaka Tsuruki

This inventor holds 7 USPTO granted patents. Top assignee: Adv Antest Corporation. Active years: 1998-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasutaka Tsuruki. Retrieved from https://idiyas.com/inventor/yasutaka-tsuruki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7

% Patents Active = 85.7

Average Co-Inventor Count = 1.6

ph-index = 5

Forward Citations = 52(Granted Patents)


Location History:

  • Kazo, JP (1998 - 1999)
  • Tokyo, JP (2004 - 2008)

Company Filing History:

goldMedal7 out of 2,281 
 
Adv Antest Corporation
 patents

Years Active: 1998-2008

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7 patents (USPTO):Explore Patents
1. 7461314 - Test device (2008-12-02),
2. 7187192 - Semiconductor test device having clock recovery circuit (2007-03-06),
3. 6956395 - Tester for testing an electronic device using oscillator and frequency divider (2005-10-18),
4. 6791389 - Variable delay circuit and a testing apparatus for a semiconductor circuit (2004-09-14),
5. 6768360 - Timing signal generation circuit and semiconductor test device with the same (2004-07-27),
6. 5886536 - Semiconductor tester synchronized with external clock (1999-03-23),
7. 5761100 - Period generator for semiconductor testing apparatus (1998-06-02),

Title: Yasutaka Tsuruki: Innovator in Semiconductor Testing Technology

Introduction

Yasutaka Tsuruki is a prominent inventor based in Tokyo, Japan. He has made significant contributions to the field of semiconductor testing technology, holding a total of seven patents. His innovative work has advanced the capabilities of testing devices used in electronic applications.

Latest Patents

Tsuruki's latest patents include a test device that features a first reference clock generation unit, a first test rate generation unit, and a first driver unit. This device is designed to supply test patterns to electronic devices based on synchronized clock signals. Another notable patent is a semiconductor test device that incorporates a clock recovery circuit. This device is capable of acquiring a multiplexed clock signal from LSI output data, utilizing a time interpolator and registers to enhance testing accuracy.

Career Highlights

Yasutaka Tsuruki is currently employed at Adv Antest Corporation, where he continues to develop cutting-edge testing technologies. His work has been instrumental in improving the efficiency and reliability of semiconductor testing processes.

Collaborations

Tsuruki has collaborated with notable colleagues, including Hideyuki Oshima and Masayuki Itoh. These partnerships have fostered innovation and contributed to the advancement of their shared field.

Conclusion

Yasutaka Tsuruki's contributions to semiconductor testing technology exemplify his dedication to innovation. His patents and collaborative efforts continue to shape the future of electronic testing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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