Semiconductor test device having clock recovery circuit

Abstract

A semiconductor test device for acquiring a multiplexed clock signal from LSI output data and using the clock to test the LSI. The device includes a time interpolator and registers connected in series. The time interpolator has flip-flops connected in parallel for receiving output data from an LSI under test, a delay circuit for successively inputting strobes delayed at a constant timing interval to the flip-flops and outputting time-series level data, and an encoder for receiving the time-series level data from the flip-flops and encoding it into position data indicating an edge timing. The registers successively store position data from the encoder and output them at a predetermined timing. The device further includes a digital filter for outputting the position data from the registers as a recovery clock.