Wuu Yean Tay

This inventor holds 29 USPTO granted patents, primarily in Microelectronic Packaging. Top assignee: Micron Technology Incorporated. Active years: 2002-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wuu Yean Tay. Retrieved from https://idiyas.com/inventor/wuu-yean-tay

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 29

% Patents Active = 62.1

Average Co-Inventor Count = 2.5

ph-index = 10

Forward Citations = 451(Granted Patents)

Company Filing History:

29 out of 39,222

Micron Technology Incorporated

patents

Years Active: 2002-2021

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Areas of Expertise:

Microelectronic Devices

Lead Frames

Wafer Reconstruction

IC Testing

Ball Grid Array

Solder Masks

Carrier Substrates

Semiconductor Devices

Phase Change Material

Testing Methods

Stacking Characteristics

29 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11189548 - Pre-encapsulated lead frames for microelectronic device packages, and associated methods (2021-11-30),

2. 9721874 - Pre-encapsulated lead frames for microelectronic device packages, and associated methods (2017-08-01),

3. 8525320 - Microelectronic die packages with leadframes, including leadframe-based interposer for stacked die packages, and associated systems and methods (2013-09-03),

4. 8357566 - Pre-encapsulated lead frames for microelectronic device packages, and associated methods (2013-01-22),

5. 7915718 - Apparatus for flip-chip packaging providing testing capability (2011-03-29),

6. 7820459 - Methods relating to the reconstruction of semiconductor wafers for wafer level processing including forming of alignment protrusion and removal of alignment material (2010-10-26),

7. 7754531 - Method for packaging microelectronic devices (2010-07-13),

8. 7573006 - Apparatus relating to the reconstruction of semiconductor wafers for wafer-level processing (2009-08-11),

9. 7425462 - Methods relating to the reconstruction of semiconductor wafers for wafer-level processing (2008-09-16),

10. 7368391 - Methods for designing carrier substrates with raised terminals (2008-05-06),

11. 7285971 - Integrated circuit (IC) test assembly including phase change material for stabilizing temperature during stress testing of integrated circuits and method thereof (2007-10-23),

12. 7190074 - Reconstructed semiconductor wafers including alignment droplets contacting alignment vias (2007-03-13),

13. 7116122 - Method for ball grid array chip packages having improved testing and stacking characteristics (2006-10-03),

14. 7071012 - Methods relating to the reconstruction of semiconductor wafers for wafer-level processing (2006-07-04),

15. 7061124 - Solder masks including dams for at least partially surrounding terminals of a carrier substrate and recessed areas positioned adjacent to the dams, and carrier substrates including such solder masks (2006-06-13),

Title: Inventor Spotlight - Wuu Yean Tay

Introduction: Wuu Yean Tay is a pioneering inventor hailing from Singapore, known for her groundbreaking contributions to the field of technology and innovation.

Latest Patents: Wuu Yean Tay holds several patents in the areas of artificial intelligence, renewable energy, and sustainable technologies, showcasing her commitment to creating a more sustainable future.

Career Highlights: With a career spanning over two decades, Wuu Yean Tay has worked with leading research institutions and tech companies to develop cutting-edge solutions that have revolutionized various industries.

Collaborations: Throughout her career, Wuu Yean Tay has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and excellence in all her projects.

Conclusion: Wuu Yean Tay's passion for innovation and her relentless pursuit of technological advancement continue to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]