logo

For the Inventor, By the Inventor

Taoyuan, Taiwan

Wu-Shiung Feng

This inventor holds 17 USPTO granted patents, primarily in VLSI Circuit Design. Top assignee: Chang Gung University. Active years: 2006-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wu-Shiung Feng. Retrieved from https://idiyas.com/inventor/wu-shiung-feng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17

% Patents Active = 5.9

Average Co-Inventor Count = 3.6

ph-index = 4

Forward Citations = 67(Granted Patents)


Location History:

  • Kwei-Shan, TW (2008)
  • Tao-Yuan, TW (2006 - 2010)
  • Taipei, TW (2015)

Company Filing History:

goldMedal17 out of 185 
 
Chang Gung University
 patents

Years Active: 2006-2015

Loading Chart...
Areas of Expertise:
Graphene
Biomedical Signal Amplifier
VLSI Interconnects
Model-Order Reduction
Clock Tree Synthesis
Digital Filter Design
Crosstalk Noise
Integrated Circuit Design
Power Consumption
High-Speed VLSI
RLC Coupled Interconnects
17 patents (USPTO):Explore Patents
1. 9181167 - Chemically-modified graphene and method for producing the same (2015-11-10),
2. 7797140 - Generalizations of adjoint networks techniques for RLC interconnects model-order reductions (2010-09-14),
3. 7738947 - Biomedical signal instrumentation amplifier (2010-06-15),
4. 7600206 - Method of estimating the signal delay in a VLSI circuit (2009-10-06),
5. 7562324 - Method of designing a synchronous circuit of VLSI for clock skew scheduling and optimization (2009-07-14),
6. 7512525 - Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders (2009-03-31),
7. 7509243 - Method of determining high-speed VLSI reduced-order interconnect by non-symmetric lanczos algorithm (2009-03-24),
8. 7437689 - Interconnect model-order reduction method (2008-10-14),
9. 7398499 - Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design (2008-07-08),
10. 7373367 - Efficient digital filter design tool for approximating an FIR filter with a low-order linear-phase IIR filter (2008-05-13),
11. 7254790 - Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops (2007-08-07),
12. 7216322 - Clock tree synthesis for low power consumption and low clock skew (2007-05-08),
13. 7216309 - Method and apparatus for model-order reduction and sensitivity analysis (2007-05-08),
14. 7191418 - Method and apparatus for rapidly selecting types of buffers which are inserted into the clock tree for high-speed very-large-scale-integration (2007-03-13),
15. 7181664 - Method on scan chain reordering for lowering VLSI power consumption (2007-02-20),

Title: Wu-Shiung Feng: Innovating the Future of Graphene and RLC Interconnects

Introduction

Wu-Shiung Feng is an accomplished inventor based in Tao-Yuan, Taiwan, with a remarkable portfolio of 17 patents. His innovative contributions to the fields of material science and electrical engineering have set benchmarks in technology, particularly through advancements in graphene modification and RLC interconnect analysis.

Latest Patents

Among Feng's latest patents is a groundbreaking development in chemically-modified graphene. This innovation includes a graphene layer with multiple functional groups grafted to it, characterized by the formula —CO—R—COOH, where R represents an optionally substituted C-Calkylene or C-Calkenylene group. The method for producing this chemically-modified graphene involves subjecting a cyclic anhydride and graphite to a Friedel-Crafts reaction in the presence of a Lewis acid, marking a significant advancement in graphene technology.

Another pivotal patent focuses on the generalizations of adjoint network techniques for RLC interconnects model-order reductions. This technique effectively reduces computational complexity by 50% in constructing congruence transformation matrices. It is particularly useful for analyzing multi-port driving-point impedance in RLC interconnect circuits, with studies showcasing both the accuracy and efficiency of the proposed methods over conventional approaches.

Career Highlights

Wu-Shiung Feng currently works at Chang Gung University, where he plays a crucial role in research and innovation. His work has earned him recognition in the engineering and materials science communities. He is not only an inventor but also a mentor and leader, guiding upcoming innovators in the field.

Collaborations

Feng collaborates with esteemed colleagues such as Chia-Chi Chu and Herng-Jer Lee. These partnerships have resulted in significant research advancements and further contributions to the fields they specialize in, fostering a collaborative environment that encourages innovative solutions to complex problems.

Conclusion

Wu-Shiung Feng's contributions to innovation in materials and electrical engineering continue to drive forward the boundaries of technology. His patents reflect a commitment to enhancing the capabilities of graphene and optimizing the performance of RLC interconnects, establishing him as a significant figure in contemporary research and development. As he continues to work at Chang Gung University, the impact of his innovative spirit will undoubtedly resonate in the field for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…