The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2009
Filed:
Jan. 05, 2005
Herng-jer Lee, Tao-Yuan, TW;
Chia-chi Chu, Tao-Yuan, TW;
Wu-shiung Feng, Tao-Yuan, TW;
Chao-kai Chang, Tao-Yuan, TW;
Herng-Jer Lee, Tao-Yuan, TW;
Chia-Chi Chu, Tao-Yuan, TW;
Wu-Shiung Feng, Tao-Yuan, TW;
Chao-Kai Chang, Tao-Yuan, TW;
Chang Gung University, Kwei-Shan Tao-Yuan, TW;
Abstract
A model reduction method utilizing the rational Arnoldi method with adaptive orders (RAMAO) is applied to high-speed VLSI interconnect models. The method is based on an extension of the classical multi-point Pade approximation, using the rational Arnoldi iteration approach. Given a set of predetermined expansion points, an exact expression for the error between the output moment of the original system and that of the reduced-order system, related to each expansion point, is derived first. In each iteration of the proposed RAMAO algorithm, the expansion frequency corresponding to the maximum output moment error will be chosen. Hence, the corresponding reduced-order model yields the greatest improvement in output moments among all reduced-order models of the same order.