The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2009
Filed:
Apr. 09, 2007
Applicants:
Ming-hong Lai, Taichung, TW;
Chao-hsuan Hsu, Toufen Township, Miaoli County, TW;
Chia-chi Chu, Tao-Yuan, TW;
Wu-shiung Feng, Tao-Yuan, TW;
Inventors:
Ming-Hong Lai, Taichung, TW;
Chao-Hsuan Hsu, Toufen Township, Miaoli County, TW;
Chia-Chi Chu, Tao-Yuan, TW;
Wu-Shiung Feng, Tao-Yuan, TW;
Assignee:
Chang Gung University, Tao-Yuan, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method estimates the signal delay in a VLSI circuit and accurately estimates the delay and conversion time of a transmission signal in the circuit in order to prevent a designer of the VLSI circuit from erroneously judging the logic made by the designed circuit.
Lai, Ming-Hong. (2009). Method of estimating the signal delay in a vlsi circuit (U.S. Patent No. 7600206). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7600206
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile