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For the Inventor, By the Inventor

Camarillo, CA, United States of America

William M Clark, Jr

This inventor holds 47 USPTO granted patents and 1 published patent application, primarily in Integrated Circuit Security. Top assignees: Hrl Laboratories, LLC, Hughes Aircraft Company, Hughes Electronics Corporation. Active years: 1985-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: William M Clark, Jr. Retrieved from https://idiyas.com/inventor/william-m-clark-jr

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 47 

% Patents Active = 61.7

Average Co-Inventor Count = 3.4

ph-index = 17

Forward Citations = 808(Granted Patents)


Location History:

  • Thousand Oaks, CA (US) (1985 - 2003)
  • Santa Barbara, CA (US) (2012 - 2013)
  • Camarillo, CA (US) (2002 - 2014)

Company Filing History:

goldMedal32 out of 2,103 
 
Hrl Laboratories, LLC
 patents
silverMedal8 out of 4,197 
 
Hughes Aircraft Company
 patents
bronzeMedal8 out of 1,334 
 
Hughes Electronics Corporation
 patents
4. 4 out of 8,313 
 
Raytheon Company
 patents
5. 2 out of 2 
 
Promtek
 patents
6. 1 out of 14 
 
Oregon Graduate Center
 patents
7. 1 out of 13 
 
Raytheon Corporation
 patents
8. 1 out of 3,975 
 
The United States of America as Represented by the United States
 patents
where one patent can have more than one assignee

Years Active: 1985-2014

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Areas of Expertise:
Integrated Circuits
Reverse Engineering
Cryptographic Architecture
Transistor Protection
Silicide Block Process
Programmable Connector
Circuit Modification
Power Analysis Prevention
Hidden Interconnections
Memory Protection
Digital Circuit Design
Semiconductor Fabrication
47 patents (USPTO):Explore Patents
1. 8679908 - Use of silicide block process to camouflage a false transistor (2014-03-25),
2. 8564073 - Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer (2013-10-22),
3. 8524553 - Integrated circuit modification using well implants (2013-09-03),
4. 8296577 - Cryptographic bus architecture for the prevention of differential power analysis (2012-10-23),
5. 8258583 - Conductive channel pseudo block process and circuit to inhibit reverse engineering (2012-09-04),
6. 8168487 - Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer (2012-05-01),
7. 8065532 - Cryptographic architecture with random instruction masking to thwart differential power analysis (2011-11-22),
8. 8049281 - Symmetric non-intrusive and covert technique to render a transistor permanently non-operable (2011-11-01),
9. 7949883 - Cryptographic CPU architecture with random instruction masking to thwart differential power analysis (2011-05-24),
10. 7935603 - Symmetric non-intrusive and covert technique to render a transistor permanently non-operable (2011-05-03),
11. 7888213 - Conductive channel pseudo block process and circuit to inhibit reverse engineering (2011-02-15),
12. 7541266 - Covert transformation of transistor properties as a circuit protection method (2009-06-02),
13. 7514755 - Integrated circuit modification using well implants (2009-04-07),
14. 7344932 - Use of silicon block process step to camouflage a false transistor (2008-03-18),
15. 7294935 - Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide (2007-11-13),

Title: William M Clark, Jr: An Innovator in Integrated Circuit Camouflage

Introduction

William M Clark, Jr. is a notable inventor based in Camarillo, California, who holds an impressive total of 47 patents. His extensive work primarily revolves around the enhancement of integrated circuit structures, particularly in the realm of security and camouflage techniques.

Latest Patents

Among his latest innovations are two significant patents. The first is titled "Use of silicide block process to camouflage a false transistor." This technique involves creating structures that camouflage an integrated circuit by using a layer of conductive material with precisely controlled outlines that mimic an operable device, even when the device is non-functional.

The second patent, "Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer," presents a method for enhancing the security of integrated circuits. It details specific configurations of transistors within a semiconductor substrate, employing ambiguous interconnection features that deceive a reverse engineer into perceiving electrical communication that may not exist.

Career Highlights

Throughout his career, Clark has significantly contributed to the field of integrated circuits. He has worked with prestigious organizations such as HRL Laboratories, LLC, and Hughes Electronics Corporation, where he has applied his expertise to develop advanced technologies.

Collaborations

In his professional journey, Clark has collaborated with other prominent individuals, including Lap-Wai Chow and James Peter Baukus. These partnerships have further propelled innovation and research within the domain of integrated circuit camouflage and security.

Conclusion

William M Clark, Jr. continues to be an influential figure in the world of technology and innovation. His patents not only push the boundaries of integrated circuits but also serve as a testament to his commitment to advancing security measures against reverse engineering. His contributions undoubtedly pave the way for future technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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