Hangzhou, China

Weihao Wang

This inventor holds 5 USPTO granted patents. Top assignee: Zhejiang Lab. Active years: 2023-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Weihao Wang. Retrieved from https://idiyas.com/inventor/weihao-wang-cbz9qe3n

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.4

ph-index = 1


Company Filing History:


Years Active: 2023-2024

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5 patents (USPTO):Explore Patents

Title: Biography of Inventor Weihao Wang

Introduction: Weihao Wang is a prominent inventor based in Hangzhou, China. He has made significant contributions to the field of wafer-level technologies, holding a total of five patents. His innovative work focuses on improving the efficiency and functionality of wafer substrates.

Latest Patents: Weihao Wang's latest patents include a routing structure and method of wafer substrate with a standard integration zone for integration on-wafer. This invention addresses yield problems associated with wafer substrates by utilizing a core voltage network, interconnection signal network, clock signal network, and ground network. Another notable patent is a software-defined wafer-level switching system design method and apparatus, which outlines a systematic approach to designing a wafer-level switching system, including layout constraints and logical topology design.

Career Highlights: Weihao Wang is currently employed at Zhejiang Lab, where he continues to advance his research and development efforts in wafer technologies. His work has garnered attention for its innovative approaches and practical applications in the industry.

Collaborations: Throughout his career, Weihao has collaborated with notable colleagues, including Shunbin Li and Ruyun Zhang. These partnerships have contributed to the successful development of his patents and research initiatives.

Conclusion: Weihao Wang stands out as a leading inventor in the field of wafer-level technologies. His contributions through patents and collaborative efforts have significantly impacted the industry, showcasing his dedication to

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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