The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

Apr. 25, 2023
Applicant:

Zhejiang Lab, Hangzhou, CN;

Inventors:

Guandong Liu, Hangzhou, CN;

Weihao Wang, Hangzhou, CN;

Shunbin Li, Hangzhou, CN;

Ruyun Zhang, Hangzhou, CN;

Assignee:

ZHEJIANG LAB, Hangzhou, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 23/473 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 25/065 (2023.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/473 (2013.01); H01L 23/3128 (2013.01); H01L 23/367 (2013.01); H01L 23/49816 (2013.01); H01L 24/16 (2013.01); H01L 25/0657 (2013.01); H01L 2224/32245 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/182 (2013.01);
Abstract

The present disclosure discloses a three-dimensional stacked package structure with a micro-channel heat dissipation structure and a packaging method thereof. The three-dimensional stacked package structure includes a chip package portion comprising a multi-layered structure with stacked chips, wherein the stacked chips are provided with through silicon vias and packaged in a three-dimensional stacked packaging manner and a silicon substrate package portion comprising a silicon substrate. The silicon substrate is provided with micro bumps which are to be interconnected with external lead wires. The chip package portion is assembled on the silicon substrate by bonding with the micro bumps. The stacked chips are etched with micro-channels and through holes corresponding to each other. The micro-channels are for coolant flowing in a horizontal direction, and the through holes are for coolant flowing in upper and lower layers. Sealing rings are arranged around the micro-channels and the through holes.


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