Princeton Junction, NJ, United States of America

Walter R Curtice

This inventor holds 11 USPTO granted patents. Top assignees: Rca Inc., USA as Represented by Secretary of the Navy. Active years: 1976-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Walter R Curtice. Retrieved from https://idiyas.com/inventor/walter-r-curtice

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.1

ph-index = 4

Forward Citations = 64(Granted Patents)


Location History:

  • Princeton Jct., NJ (US) (1978)
  • West Windsor, NJ (US) (1979)
  • West Windsor Township, Mercer County, NJ (US) (1979)
  • Princeton Junction, NJ (US) (1976 - 2002)

Company Filing History:


Years Active: 1976-2002

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11 patents (USPTO):Explore Patents

Title: Walter R Curtice: Innovator in Integrated Circuits and Fast Ternary Logic

Introduction:

Walter R Curtice, an esteemed inventor based in Princeton Junction, NJ, has left a significant mark on the field of electronic engineering with his groundbreaking innovations in integrated circuits and fast ternary logic. With 11 patents to his name, Curtice has revolutionized the technology industry, particularly in mitigating soft errors and enhancing device performance. Let's delve into his latest patents, career highlights, collaborations, and his overall contribution to the field.

Latest Patents:

Curtice's latest patents showcase his expertise in creating electronic structures that exhibit immunity to single event effects. The first patent introduces an electronic structure with a buffer layer having a short average carrier lifetime. By employing a high recombination rate buffer layer, such as an LT GaAs or GaAs:Er buffer layer, the integrated circuit's susceptibility to soft errors is significantly reduced. This innovation is crucial for maintaining reliable performance, especially with higher clock speeds and dynamic use environments.

The second patent demonstrates Curtice's advancements in designing fast ternary (GaInAs) logic gate devices. By carefully selecting the dopant density (N) and the active layer thickness (a) within specific ranges, Curtice achieves optimal device performance and substantially reduces the propagation delay between input and output terminals. This innovation holds promising potential for enhancing digital integrated circuits, including inverters, with significantly low output capacitance.

Career Highlights:

Throughout his career, Walter R Curtice has made noteworthy contributions to the field of electronic engineering. He has actively worked with prominent companies such as RCA Inc., an American electronics company, and The United States of America, represented by the Secretary of the Navy. His association with these organizations underscores his impact and recognition within the industry.

Collaborations:

Curtice has collaborated with several talented individuals during his inventive journey. Notably, he has worked alongside peers such as Todd Russell Weatherford and Dale P McMorrow. These collaborations have likely played a vital role in fostering innovative thinking, knowledge sharing, and the development of groundbreaking technologies.

Conclusion:

Walter R Curtice's passion for innovation and his expertise in integrated circuits and fast ternary logic have significantly impacted the field of electronic engineering. His patents highlight his commitment to creating electronic structures with increased reliability and enhanced device performance. Through his collaborations and career accomplishments, Curtice has undoubtedly left a lasting impression on the industry, solidifying his place as an influential innovator.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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