The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2002

Filed:

May. 31, 1996
Applicant:
Inventors:

Todd R. Weatherford, Pence Spring, WV (US);

Dale P. McMorrow, Chantilly, VA (US);

Walter R. Curtice, Princeton Junction, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/9812 ; H01L 2/9207 ;
U.S. Cl.
CPC ...
H01L 2/9812 ; H01L 2/9207 ;
Abstract

The present invention is an electronic structure having a buffer layer with a short average carrier lifetime, at least about 1000 Å thick with an upper face, and an integrated circuit disposed over the upper face of the buffer layer, where this integrated circuit would otherwise be susceptible to soft errors, due to its configuration, its clock speed, its use environment, or a combination of these factors. In a preferred embodiment, the preferably high recombination rate buffer layer is an LT GaAs or GaAs:Er buffer layer.


Find Patent Forward Citations

Weatherford, Todd. (2002). Integrated circuits with immunity to single event effects (U.S. Patent No. 6483134). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6483134

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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