Wai Lau

Title: Wai Lau and Low-Leakage MOSFET Circuit Innovations.

Introduction

Wai Lau is an inventor associated with Hong Kong, CN, and National Semiconductor Corporation. His patent work includes circuit designs intended to reduce leakage currents in circuits that use very small MOSFET devices. Lau is credited with 3 patents.

Latest Patents

One of Lau’s latest patents describes circuitry for reducing leakage currents in a transmission-gate switch. The test circuit connects a high-impedance node to an external test point when a test signal is enabled. It uses two transmission-gate switches and a biasing circuit that applies a negative gate-to-source voltage (Vgs) bias to an N-channel transistor when the test signal is disabled, helping reduce leakage.

Another patent addresses leakage in pull-up and pull-down circuits. Its pull-down design uses two N-channel transistors controlled by a pull-down signal, along with a gate-biasing circuit. When the signal is inactive, the biasing circuit applies a Logic 1 voltage to a common node, creating a negative Vgs bias on the first transistor. The patent also discloses an analogous pull-up circuit.

Career Highlights

Lau’s described inventions focus on managing leakage in MOSFET-based circuitry, including test circuits and pull-up and pull-down circuits. These designs use transistor arrangements and biasing techniques to limit unwanted current when circuit paths are inactive.

Collaborations

Lau is associated with National Semiconductor Corporation. His coworker is Jane Xin-LeBlanc.

Conclusion

Wai Lau’s patent work centers on reducing leakage currents in small-MOSFET circuits through carefully designed switching and biasing arrangements.