Location History:
- Santa Clara, CA (US) (2002 - 2003)
- San Jose, CA (US) (1999 - 2009)
Company Filing History:
Years Active: 1999-2009
Title: Innovations of Tuan L Phan
Introduction
Tuan L Phan is a notable inventor based in San Jose, California, recognized for his contributions to the field of memory technology. With a total of 11 patents to his name, he has made significant advancements in built-in self-test (BIST) schemes and reliability controllers for memory devices.
Latest Patents
One of his latest patents is the "Hard BISR scheme allowing field repair and usage of reliability controller." This innovative BISR scheme enables on-chip assessment of memory repair and flags devices as failures when they exceed predetermined limits. A counter is established during production testing to determine pass/fail criteria, allowing for effective memory repair solutions.
Another significant patent is the "Asynchronous BIST for embedded multiport memories." This invention provides a method and apparatus for testing multiport memories asynchronously. The BIST unit applies read and write test operations concurrently to multiple memory ports, utilizing different clock signals to enhance testing accuracy and detect potential faults.
Career Highlights
Throughout his career, Tuan L Phan has worked with prominent companies such as LSI Logic Corporation and LST Corporation. His experience in these organizations has contributed to his expertise in memory technology and innovation.
Collaborations
Tuan has collaborated with notable colleagues, including V Swamy Irrinki and William D Schwarz, further enhancing his work in the field of memory systems.
Conclusion
Tuan L Phan's innovative contributions to memory technology through his patents and collaborations have significantly impacted the industry. His work continues to influence advancements in reliability and testing methodologies for memory devices.