This inventor holds 2 USPTO granted patents. Top assignee: Cadence Design Systems, Inc.. Active years: 2014-2015.
Company Filing History:
Years Active: 2014-2015
Title: Tsuwei Ku: Innovator in Data Path Optimization
Introduction
Tsuwei Ku is a notable inventor based in Cupertino, CA (US), recognized for his contributions to the field of integrated circuit design. With a focus on optimizing data paths, he has developed innovative methods that enhance the efficiency of circuit logic.
Latest Patents
Tsuwei Ku holds 2 patents, showcasing his expertise in logic synthesis and circuit design. His latest patents include:
1. **Methods and apparatus for data path cluster optimization** - This invention discloses a method of logic synthesis that involves generating multiple design architecture alternatives for circuit logic within a data path cluster. The process includes saving these alternatives and evaluating them against design constraints to select the most suitable architecture.
2. **Physically aware logic synthesis of integrated circuit designs** - This patent describes a method for synthesizing physical gates from register transfer logic code. It involves reading an RTL input file, parsing it into Boolean logic equations, and optimizing these equations based on wire costs and timing delays.
Career Highlights
Tsuwei Ku is currently employed at Cadence Design Systems, Inc., where he applies his innovative techniques to advance integrated circuit design. His work has significantly impacted the efficiency and performance of electronic devices.
Collaborations
Throughout his career, Tsuwei has collaborated with talented individuals such as Yu-Fang Chung and Ankush Sood, contributing to various projects that push the boundaries of technology.
Conclusion
Tsuwei Ku's innovative work in data path optimization and integrated circuit design has established him as a key figure in the field. His patents reflect a commitment to enhancing the efficiency of electronic systems, making significant contributions to the industry.