Wuxi, China

Tse-Huang Lo

This inventor holds 5 USPTO granted patents. Top assignees: Csmc Technologies Fab2 Co., Ltd., Csmc Technologies Fab1 Co., Ltd.. Active years: 2014-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tse-Huang Lo. Retrieved from https://idiyas.com/inventor/tse-huang-lo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.4

ph-index = 1

Forward Citations = 1(Granted Patents)


Location History:

  • Jiangsu, CN (2015)
  • Taiwan, CN (2021)
  • Wuxi, CN (2014 - 2022)

Company Filing History:


Years Active: 2014-2022

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5 patents (USPTO):Explore Patents

Title: The Innovations of Inventor Tse-Huang Lo

Introduction

Tse-Huang Lo is a prominent inventor based in Wuxi, China, known for his significant contributions to semiconductor technology. With a total of five patents to his name, his work has greatly influenced the field of MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) devices, which are crucial components in modern electronic applications.

Latest Patents

Among Tse-Huang Lo's latest innovations are patented methods for MOSFET manufacturing. One notable patent describes a comprehensive method that involves etching an oxide layer and a silicon nitride layer on a first conductivity type well region. The process includes forming an opening that exposes the well region, etching to create a first trench, and depositing a medium oxide layer. Subsequently, the method involves back etching and the creation of a second trench that connects to the first, alongside forming a grid within the trench and integrating a second conductivity type well region at its base. The patent also addresses the removal of oxide and silicon nitride layers and the formation of drains outside the trench.

Another significant patent by Tse-Huang Lo pertains to a new MOSFET structure and its manufacturing method. This structure comprises a substrate with a well region of the first conductivity type, a first trench extending downward into a second conductivity type well region, and includes a source structured beneath the trench. The design also details the configuration of a gate oxide layer, polysilicon gates, and conductive plugs, illustrating a sophisticated approach to enhancing MOSFET performance.

Career Highlights

Tse-Huang Lo has had a notable career within the semiconductor industry, having worked with esteemed organizations such as CSMC Technologies Fab1 Co., Ltd. and CSMC Technologies Fab2 Co., Ltd. These companies are recognized for their advanced manufacturing capabilities and have provided a platform for Lo to advance his innovative ideas.

Collaborations

Through his career, Tse-Huang Lo has collaborated with talented individuals including Hsiao-Chia Wu and Hua Song. Their combined expertise has fostered a collaborative environment that enriches creativity and innovation in semiconductor research and development.

Conclusion

Tse-Huang Lo embodies the spirit of innovation through his commitments to advancing MOSFET technology. With multiple patents to his credit and collaborations with industry professionals, his work continues to impact the semiconductor landscape. As technology advances, the contributions of inventors like Tse-Huang Lo remain integral to shaping the future of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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