Till Schlösser

This inventor holds 28 USPTO granted patents, primarily in Integrated Circuit Design. Top assignees: Infineon Technologies Ag, Siemens Aktiengesellschaft. Active years: 2001-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Till Schlösser. Retrieved from https://idiyas.com/inventor/till-schlandoumlsser

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 28

% Patents Active = 82.1

Average Co-Inventor Count = 2.6

ph-index = 10

Forward Citations = 474(Granted Patents)

Location History:

München, DE (2001 - 2003)
Dresden, DE (2002 - 2004)

Company Filing History:

26 out of 15,027

Infineon Technologies Ag

patents

2 out of 30,874

Siemens Aktiengesellschaft

patents

Years Active: 2001-2004

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Areas of Expertise:

Read/Write Amplifier

Vertical Transistors

DRAM Memory

Integrated Semiconductor

Ferroelectric Transistor

Miniaturized Capacitor

Memory Cell Configuration

Magnetoresistive Storage

High-ε Dielectric

FEMFET Device

Fabrication Method

Integrated Memory

28 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6822916 - Read/write amplifier having vertical transistors for a DRAM memory (2004-11-23),

2. 6798689 - Integrated memory with a configuration of non-volatile memory cells and method for fabricating and for operating the integrated memory (2004-09-28),

3. 6798000 - Field effect transistor (2004-09-28),

4. 6750098 - Integrated semiconductor memory and fabrication method (2004-06-15),

5. 6737689 - FEMFET device and method for producing same (2004-05-18),

6. 6645822 - Method for manufacturing a semiconductor circuit system (2003-11-11),

7. 6642565 - Miniaturized capacitor with solid-state dielectric, in particular for integrated semiconductor memories, E.G. DRAMS, and method for fabricating such a capacitor (2003-11-04),

8. 6638812 - Method for producing a memory cell for a semiconductor memory (2003-10-28),

9. 6608340 - Substrate assembly having a depression suitable for an integrated circuit configuration and method for its fabrication (2003-08-19),

10. 6576948 - Integrated circuit configuration and method for manufacturing it (2003-06-10),

11. 6566193 - Method for producing a cell of a semiconductor memory (2003-05-20),

12. 6566187 - DRAM cell system and method for producing same (2003-05-20),

13. 6538273 - Ferroelectric transistor and method for fabricating it (2003-03-25),

14. 6534820 - Integrated dynamic memory cell having a small area of extent, and a method for its production (2003-03-18),

15. 6521935 - Mos transistor and dram cell configuration (2003-02-18),

Title: A Closer Look at Inventor Till Schlösser's Innovative Patents

Introduction:

Till Schlösser, a renowned inventor based in Dresden, Germany, has made significant contributions to the field of technology with his 28 patented inventions.

Latest Patents:

One of his latest patents includes a read/write amplifier for a DRAM memory, addressing the challenge of miniaturization in memory cells. By utilizing vertical transistors, Schlösser's design maximizes space efficiency, enabling the integration of read/write circuits in narrower grid arrangements. Additionally, his field-effect transistor with nanowire and nanotube components offers enhanced control over channel region conductivity.

Career Highlights:

Schlösser has showcased his expertise while working at industry giants such as Infineon Technologies AG and Siemens Aktiengesellschaft. His innovative approach to solving technological challenges has earned him a reputation as a forward-thinker in the field.

Collaborations:

Throughout his career, Schlösser has collaborated with esteemed professionals in the industry, including Franz Hofmann and Josef Willer. These collaborations have not only enriched his work but also fostered a culture of innovation and knowledge sharing.

Conclusion:

Inventor Till Schlösser's inventive spirit and dedication to technological advancements have left a lasting impact on the field. His work continues to inspire future generations of innovators to push the boundaries of what is possible in the world of technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]