This inventor holds 4 USPTO granted patents. Top assignees: Advanpack Solutions Pte Ltd., St Assembly Test Services Inc.. Active years: 2002-2006.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2002-2006
Title: Biography of Inventor Tie Wang
Introduction
Tie Wang is a prominent inventor based in Singapore, known for his significant contributions to semiconductor packaging technology. With a total of four patents to his name, he has developed innovative methods that enhance the efficiency and performance of semiconductor devices.
Latest Patents
His latest patents include:
1. **Strip-fabricated flip chip in package and flip chip in system heat spreader assemblies and fabrication methods therefor** - This patent describes a method for fabricating a semiconductor package using a substrate in a strip format, where semiconductor devices are attached in a strip format, and a thermal interface material is applied to enhance heat dissipation.
2. **Method for fabricating a flip chip package with pillar bump and no flow underfill** - This invention outlines a method for joining a semiconductor integrated circuit (IC) chip in a flip chip configuration, utilizing pillar bumps and no flow underfill, which improves assembly yield and meets lead-free requirements.
Career Highlights
Tie Wang has worked with notable companies in the semiconductor industry, including Advanpack Solutions Pte Ltd and ST Assembly Test Services Inc. His experience in these organizations has allowed him to refine his skills and contribute to cutting-edge technologies in semiconductor packaging.
Collaborations
Throughout his career, Tie has collaborated with talented professionals such as Ping Miao and Chun Sing Colin Lum. These collaborations have fostered innovation and
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile