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For the Inventor, By the Inventor

Kanagawa, Japan

Tetsuo Fukushi

This inventor holds 14 USPTO granted patents and 4 published patent applications and 1 EPO patent. Top assignees: Renesas Electronics Corporation, Nec Electronics Corporation. Active years: 2009-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tetsuo Fukushi. Retrieved from https://idiyas.com/inventor/tetsuo-fukushi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 14 

% Patents Active = 85.7

 

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 26(Granted Patents)


Location History:

  • Kawasaki, JP (2009 - 2016)
  • Kanagawa, JP (2012 - 2017)
  • Tokyo, JP (2016 - 2023)

Company Filing History:

goldMedal13 out of 7,651 
 
Renesas Electronics Corporation
 patents
silverMedal1 out of 2,467 
 
Nec Electronics Corporation
 patents

Years Active: 2009-2026

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14 patents (USPTO):Explore Patents
1. 12548617 - DRAM circuit (2026-02-10),
2. 11710511 - Semiconductor device having a high-speed memory with stable operation (2023-07-25),
3. 10891986 - Semiconductor device (2021-01-12),
4. 9847108 - Semiconductor storage device (2017-12-19),
5. 9384788 - Multilayered semiconductor device (2016-07-05),
6. 9251886 - Semiconductor storage device (2016-02-02),
7. 9251868 - Multilayered semiconductor device (2016-02-02),
8. 9123391 - Semiconductor storage device (2015-09-01),
9. 8811103 - Semiconductor memory integrated device having a precharge circuit with thin-film transistors gated by a voltage higher than a power supply voltage (2014-08-19),
10. 8681577 - Semiconductor memory integrated device having a precharge circuit with thin-film transistors gated by a voltage higher than a power supply voltage (2014-03-25),
11. 8482999 - Semiconductor memory integrated device having a precharge circuit with thin-film transistors gated by a voltage higher than a power supply voltage (2013-07-09),
12. 8335116 - Semiconductor storage device (2012-12-18),
13. 8279691 - Semiconductor memory integrated device with a precharge circuit having thin-film transistors gated by a voltage higher than a power supply voltage (2012-10-02),
14. 7633310 - Semiconductor integrated circuit capable of autonomously adjusting output impedance (2009-12-15),

Title: Tetsuo Fukushi: Innovator in Semiconductor Technology

Introduction

Tetsuo Fukushi is a prominent inventor based in Kanagawa, Japan, known for his significant contributions to semiconductor technology. With a total of 13 patents to his name, Fukushi has made remarkable advancements in the field, particularly in high-speed memory devices.

Latest Patents

One of Fukushi's latest patents is a semiconductor device featuring a high-speed memory with stable operation. This innovative device includes a memory mat with multiple memory cells, a sense amplifier connected to a selected memory cell, and various power supply wirings. The design addresses the challenges of data wiring in semiconductor devices, optimizing the area occupied by data wirings and enhancing the efficiency of memory cell arrays.

Career Highlights

Fukushi has had a distinguished career, working with leading companies in the electronics industry. He has been associated with Renesas Electronics Corporation and NEC Electronics Corporation, where he contributed to the development of cutting-edge semiconductor technologies.

Collaborations

Throughout his career, Fukushi has collaborated with notable colleagues, including Muneaki Matsushige and Atsunori Hirobe. These partnerships have fostered innovation and have been instrumental in advancing semiconductor research and development.

Conclusion

Tetsuo Fukushi's work in semiconductor technology has had a lasting impact on the industry. His innovative patents and collaborations highlight his dedication to advancing technology and improving memory device performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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